1. Field of the Invention
The present invention relates to integrated circuit resistors and more particularly to an advantageous structure for realizing small value precision integrated circuit resistors and a method of making the same so as to reduce the effect of parasitic end resistances.
2. State of the Art
Integrated circuit resistors are well-known. Applications specific integrated circuits (ASICs) often require small value precision resistors (less than 50 ohms), for example to achieve circuit matching. Small value precision resistors are difficult to manufacture because parasitic end resistances are often comparable to the value of the controlled resistance.
The layout of a typical integrated circuit resistor is shown in FIG. 1A. The resistor consists of an active area 11 having a length L and width W and, at both ends of the resistor, an adjoining silicided area (13, 13') covered either wholly or partially by a metal layer (15, 15') containing a contact (17, 17') to the silicided area, the contact also being formed of metal. A dielectric 18 isolates the metal and silicide except at the contact. A cross section of the resistor appears in FIG. 1B. The resistor material 11 is made up of a doped region of a silicon or polysilicon substrate 10, usually passivated with a layer 18 of silicon dioxide. The contacts 17 and 17', the silicided areas 13 and 13' and the active area 11 have associated therewith resistances Rc, Rsil and Rr respectively. The resistance of the metal is neglected for illustration purposes.
Further resistances Rt are exhibited along a critical length of an interface between the silicided areas 13 and 13' and the active area of the resistor 11. The silicided areas have very low sheet resistance and are formed by depositing titanium on the surface of the resistor material and heating the structure to about 800.degree. C., causing the titanium to react with the silicon (or polysilicon) substrate surface to form titanium silicide. The silicide has a sheet resistance of only 2-5 ohms per square as compared with a sheet resistance of about 110 ohms per square for highly doped silicon. Current flowing into the resistor is therefore mostly confined to the silicided area except along a short critical length adjacent the active area 11 along which the current, having nowhere else to go, enters the active area. This transition region exhibits a resistance Rt. Similarly, current flowing out the resistor, as it reaches the edge of the doped active area, enters the low-resistance silicided area, the transition region again exhibiting a resistance Rt.
The equivalent circuit of the integrated circuit resistor is shown in FIG. 1C. The desired resistance Rr is connected at each end to a parasitic end resistance Re equal to the sum of the transition resistance Rt, the silicide resistance Rsil and the contact resistance Rc, such that R.sub.TOT =2R.sub.c +2R.sub.sil +2R.sub.t +R.sub.r.
Normally, for resistors of several hundred ohms or more, the parasitic end resistances Re are negligible compared to the resistance Rr. Therefore, to form a resistor of a desired value, the active area 11 is doped to exhibit a suitable sheet resistance and the dimensions L and W are chosen such that Rr=Ro*L/W where Ro is the sheet resistance of the active area.
As the desired resistance Rr decreases, however, the parasitic end resistances Re become more and more significant, making small value precision resistors difficult to realize. For resistance values less than 50 ohms, the transition parasitic resistances Rt alone become comparable to the value of Rr. Resistor variability then becomes a function not only of the lithographic control of L and W but also, undesirably, a function of the electrical quality of the silicide/active area interface. Moreover, the electrical quality of the silicide/active area interface is not always entirely predictable.
What is needed then, is a method of making small value precision resistors more easily, and an integrated circuit resistor structure in which the effects of parasitic end resistance are reduced.